Speed of Chips Accelerates With Unwitting Discovery

At first, it looked like a mistake.

Mark Bohr and his team of computer-chip engineers at Intel Corp.’s Hillsboro, Ore., campus were trying to enhance the performance of transistors, the building blocks of a microprocessor. They were focusing on reducing the electrical resistance, which in turn would speed the flow of electrons and allow the chip to process data faster.

One experiment back in the summer of 2000 produced results that were far better than expected. In fact, the performance boost was so off the charts that there had to be another explanation.

There was.

It turned out that the Intel team had stumbled onto a technique known as “strained silicon,” in which stress is applied to silicon atoms so that electrons can flow between them faster. Intel will bring the technology to market early in 2004 in the generation of chips that succeeds the popular Pentium 4.

Several industry heavyweights had long been trying to incorporate strained silicon into their chips to improve efficiency. IBM Corp. had been publishing research papers on the topic for more than a decade. Advanced Micro Devices Inc., Texas Instruments Inc. and other chip makers were all eagerly researching the subject as well.

At Intel, strained silicon was not a priority. But the company, whose chips power more than 80% of the world’s PCs, was the first to figure out how to apply the technology to massive volumes of chips at low cost. It just didn’t know it at the time.

“We kind of backed into it,” said Bohr, 50, who is director of microprocessor technology for Intel’s Technology and Manufacturing Group.

Semiconductor makers are constantly searching for ways to shrink transistors and microprocessors to pack more computing power onto their chips. The state of the art for chip components currently is 90 nanometers, which makes them about 1,500 times more narrow than a human hair. But as they approach the physical limits of how small such components can be, engineers must look for other ways to enhance chip performance.

Enter strained silicon. The technique relies on silicon compounds to stretch silicon atoms in some directions and compress them in others, like a molecular version of Silly Putty.

When a chemical compound called silicon germanium is next to pure silicon, for instance, the bigger silicon germanium molecules stretch the lattice structure of neighboring silicon atoms, increasing the distance between some of them by about 1%. It may not sound like much, but it’s enough to speed the flow of electricity by up to 30% in certain transistors. That means data can be processed faster too.

“It’s like widening the lanes for traffic,” said Rob Willoner, a manufacturing technology analyst at Intel’s headquarters in Santa Clara, Calif.

Tahir Ghani and Kaizad Mistry, electrical engineers who work for Bohr, spent a good deal of 1999 and 2000 experimenting with silicon germanium to boost electricity flow through transistors. Initially, they expected to see about a 10% improvement.

Instead, they recorded speeds up to 30% faster.

“When we saw the higher performance improvements, we thought we had something big,” recalled Ghani, who grew up in Pakistan. Added Mistry, whose childhood was divided between India and the U.S.: “The first excitement was that that number was as large as it was, because that’s really our job: to make that number as large as possible.”

Bohr responded by adding extra engineers to the project, and hundreds of sophisticated experiments were drawn up. In all, roughly 40 people were dedicated to unraveling the mystery.

The challenge, Mistry said, was conducting a painstaking analysis of the electrical measurements to “try to figure out what is going on inside that microscopic piece of silicon that you can’t really see.”

For a full year, the members of Bohr’s team carefully retraced their steps. They wanted to be able to control the degree of strain on the silicon and reproduce their results consistently.

Ghani, 43, and Mistry, 42, conducted their investigation in cubicles, conference rooms and the sterile “clean room” where chips are manufactured. They communicated incessantly, frequently messaging each other and Bohr from their wireless laptop computers.

At home, Ghani would put his three young children to bed, then log on to his computer. Mistry would tuck in his two kids and join Ghani online. Then they would stay up until midnight poring over reports and discussing them via e-mail or on the phone.

Ghani would be awakened by phone calls at all hours of the night from Intel technicians: A result wasn’t what was anticipated. The instructions weren’t clear. What should we do?

By the end of 2000, Bohr and his lieutenants had determined that the silicon germanium was causing strain. Then they had to ensure they understood the process and could repeat it reliably enough to manufacture chips in large quantities.

Progress was very methodical, the scientists said. There were no occasions of running breathlessly to a colleague with a ream of computer printouts or high-fives in the clean room, as one might imagine if Hollywood were to turn the story into a film.

“Most learning happened in meetings,” Ghani said.

Long stretches of intense lab work were only occasionally broken up by social activities, such as an excursion to see “Star Wars: Episode II Attack of the Clones” in the spring of 2002.

Intel said little about its suspicions as it continued its top-secret research. Then it astounded the industry in August 2002 when it said its new generation of 90-nanometer chips would include strained silicon.

Intel “stunned analysts and sent competitors into catch-up mode,” the trade publication Electronic Engineering Times wrote at the time.

“It’s a phenomenal step,” said Gene Fitzgerald, a professor of materials science and engineering at MIT and an expert on strained silicon.

Intel found it could implement strained silicon fairly inexpensively and improve electricity flow by 25% to 30%. That meant computers that could process data faster, though Intel won’t say how much.

“We’re getting good improvement in chip performance with almost no increase in cost,” Willoner said.

Experts knew it wasn’t idle talk coming from the world’s largest producer of computer microprocessors.

“Intel clearly was the first one to start talking about using strained silicon, and when they talk, they typically are pretty far along with their implementation, “ said Risto Puhakka, vice president of VLSI Research, a San Jose firm that monitors the industry.

IBM executives say too much is being been made of Intel’s introduction of the first mass-market chip with strained silicon. The Armonk, N.Y., company began shipping some chips that include layers of strained silicon during the fourth quarter of 2003--the same time period as Intel.

Intel “is trying to introduce confusion because it’s embarrassing to admit that this has been out there for a decade,” said IBM Chief Technologist Bernie Meyerson, who is credited with developing ways to grow large amounts of silicon germanium. However, he declined to identify which IBM chips contain strained silicon or which customers were buying them.

No. 2 chip maker AMD, which is researching strained silicon and other technologies with IBM, isn’t planning to sell microprocessors with a significant degree of strained silicon until 2005 or 2006, said Craig Sander, a vice president at the Sunnyvale, Calif., company.

“AMD is selling chips with a low level of strain, but not on the order of magnitude of Intel,” Sander said. “Strain is not new; getting high levels of strain is more new.”

Nathan Brookwood, principal analyst with the Saratoga, Calif.-based market research firm Insight 64, acknowledged that IBM had been the first to show that strained silicon would improve chip performance.

“But as far as I know,” he said, engineers at Intel “are the first folks to commercialize the process, so that gives them some bragging rights.”